Last year Intel announced a new family of 100 Gigabit network adapters, code-name Columbiaville. These new adapters, based on the new Intel Ethernet Controller E810, support 10/25/50/100 Gbps link speeds and provide programmable offload capabilities.
800 Series adapters implement new features to improve connectivity, storage protocols, and programmability, also thanks to the Dynamic Device Personalization (DDP) technology which adds support for a programmable pipeline. In fact, with DDP, a parser embedded in the controller can support the software parsing custom protocols and manipulating outgoing packets, paving the way to adding new offload capabilities, in addition to those usually available in commodity adapters (e.g. Large Receive Offload, L3/L4 checksum computation, VLAN stripping, etc.). The ability, for instance, to classify custom protocols in hardware and distribute packets to specific queues based on custom packet types, improves the application performance in many use cases. It is possible for instance to extend Receive Side Scaling (RSS) and Flow Director (FDIR) capabilities to be able to inspect encapsulated packet headers as in case of GTP traffic. This was firstly introduced in 700 Series controllers, but with the 800 series it is possible to load custom DDP profiles at boot or during run-time.
The ice-zc driver, introduced a few weeks ago as part of the PF_RING ZC framework, provides Zero-Copy support for 800 Series adapters. Based on initial tests at 100 Gigabit on an Intel Xeon E-2136 CPU @ 3.30GHz, this controller demonstrated to be capable of capturing traffic at 25 Mpps per queue (it scales almost linearly by enabling RSS ) and transmitting almost 90 Mpps by using a single core. On an adequate CPU with enough cores this should let us process 100 Gigabit traffic with multi-process/multi-threaded applications that can leverage on RSS to distribute the load to multiple cores like nProbe Cento. In the above scenario, nProbe Cento processed with 6 RSS queues 78 Mpps (10k flows, 52 Gbit with 64 byte packets or 100 Gbit line rate with larger packets) with no drops making it suitable for low-cost commodity-hardware based packet processing.
The ice-zc driver is already available in the nightly build repository and it can be installed following the instructions provided in the User’s Guide, which are the same for all the ZC drivers. The Intel E810 requires a programmable pipeline DDP package to be loaded by the driver during initialisation to support normal operations. The default DDP package file name is ice.pkg, this is provided with the ice-zc driver and should be placed under /lib/firmware/updates/intel/ice/ddp or /lib/firmware/intel/ice/ddp in order to be found by the driver. Done that your adapter is detected by PF_RING and you can use with tools such as pfcount or zsend.
Please note that the E810 chipset is currently in pre-release, to get early access to ethernet adapters for testing please contact Silicom.